SPI Passive

The JTAG pins must be inactive during SPI passive configuration.

Table 1. Passive Mode Timing Parameters

Symbol	Parameter	Min	Typ	Max	Units
fMAX_S	Passive mode X1 configuration clock frequency for speed grades C4L and I4L.	–	–	10	MHz
	Passive mode X1 configuration clock frequency for speed grades C3, C4, and I4.	–	–	12.5	MHz
	Passive mode X2, X4 or X8 configuration clock frequency.	–	–	50	MHz
	Passive mode X16 or X32 configuration clock frequency.	–	–	100	MHz
tCLKH	Configuration clock pulse width high.	0.48*1/fMAX_S	–	–	ns
tCLKL	Configuration clock pulse width low.	0.48*1/fMAX_S	–	–	ns
tSU	Setup time.	6.5	–	–	ns
tH	Hold time.	1	–	–	ns
tDMIN	Minimum time between deassertion of CRESET_N to first valid configuration data.	1.2	–	–	μs

Note: Refer to Power Up Sequence for details on the power-up requirements.