RX PHY Interface

At the RX path, the Triple Speed Ethernet MAC core decodes the selected PHY interface (RGMII, MII, RMII, GMII, or SGMII) and outputs the corresponding data stream on the RX AXI ST interface. If the received Ethernet frame begins at the upper octet, the Triple Speed Ethernet MAC core realigns the streaming data so that rx_axis_mac_tstrb starts with 2’b11.

Every Ethernet Frame received by the Triple Speed Ethernet MAC core is checked against the following criteria:
  • Frame Length—Verification of minimum and maximum frame size.
  • FCS Check—Validation of the frame check sequence.
  • Error Frame Detection—Identification of corrupted or invalid frames.
  • Pause Frame Recognition—Detection and processing of PAUSE control frames.
  • Address or Broadcast Filtering—Filtering based on programmed Triple Speed Ethernet MAC core addresses and broadcast rules.
Note: Frame Length and FCS Check are performed only for non-error frames received from the PHY. If the PHY reports an error frame (e.g., via gm_rx_err), the Triple Speed Ethernet MAC core bypasses Frame Length and FCS checking for that frame. Consequently the aRxFrameMismatchedLength and aRxFrameCheckSequenceErrors statistic counters do not increment even if the frame exhibits length mismatch or FCS errors.

More details on the RX frame handling are provided in Erroneous RX Frame, Address Filtering and Broadcast Filtering at RX, and Decoding Pause Frame at RX.