Introduction
The Triple Speed Ethernet MAC core is a configurable core that complies with the IEEE Std. 802.3-2008 specification. The core supports Ethernet speeds of 2500 Mbps, 1000 Mbps, 100 Mbps, and 10 Mbps, with full duplex transfer mode.
Note: Starting with IP version 7.0:
- Packets filtered by address filtering or broadcast filtering are silently
dropped when
crc_fwd=0 - When AXI Data Width = 8 and TX/RX FIFO is disabled, Cut
Through mode is implemented to achieve minimum latency.
- TX and RX AXI4-Stream interface operates on
tx_mac_aclkandgm_rx_cclock domains respectively in Cut Through mode. Hence, thetx_axis_clkandrx_axis_clkports are not used and connect to logic0. - If
tx_axis_mac_tvalidis deasserted before the end of the frame in Cut Through mode, the frame is terminated and flagged as a bad frame. See Terminating Bad TX Frames. - See Clock Sources and Cut Through Mode for more details.
- TX and RX AXI4-Stream interface operates on
Use the IP Manager to select IP, customize it, and generate files. The Triple Speed Ethernet MAC core has an interactive wizard to help you set parameters. The wizard also has options to create a testbench and/or example design targeting an Efinix® development board.