TX FIFO Overflow

In Store Forward mode, the TX FIFO may overflow under the following conditions:
  • FIFO depth insufficient for one full frame—When the write and read sides of the TX FIFO operate at equal bandwidth, the FIFO must be sized large enough to store an entire maximum-sized frame, as described in Store Forward Mode.
  • Write Bandwidth Exceeds Read Bandwidth—If the FIFO is sized to accommodate a full frame, overflow can still occur when the write side (TX AXI-ST interface) provides data at a rate higher than the read side (Triple Speed Ethernet MAC core transmit engine) can drain it. In this condition, the FIFO may fill before the Triple Speed Ethernet MAC core completes transmitting the earlier data.

For both scenarios, once a TX FIFO overflow is detected, the Triple Speed Ethernet MAC core silently drops the entire frame without transmitting it. Each overflow event increments the aTxFifoOverflowFramesErrors counter.