Example Design with External PHY
The example design with external PHY demonstrates the functionality of the Triple Speed Ethernet MAC core running at 1000 Mbps. It includes two test modes:
- Normal mode—The MAC or UDP pattern generator constructs and initiates TX packets for the TX path of the Triple Speed Ethernet MAC core.
- Linked-Partner mode—The TX packets are constructed by the other end of the network, for example a computer.
The example design consists of:
- MAC or UDP pattern generator—Generates the MAC/UDP TX packet to the Triple Speed Ethernet MAC core though AXI4-ST TX interface
- RISC-V Sapphire SOC—Allows you to configure the Triple Speed Ethernet MAC core configuration register and example design configuration register. Refer to Table 1 for more details.
Note: The example design with external PHY is validated with RISC-V
Sapphire core version 2.2. You are advised not to upgrade the SoC core to a newer
version, as this may lead to system incompatibility or functional failure.
