Use the I2C Interface for DDR Calibration

You can use the I2C interface to calibrate and reset the DDR DRAM interface on the TrionĀ® T120 BGA324 Development Board or TrionĀ® T120 BGA576 Development Board. If you want to use calibration:

  1. In the Efinity Interface Designer, select the DDR block and turn on Enable Control in the Block Editor's Control tab. Save.
  2. In your RTL design, connect the I2C interface to the DDR block's I2C interface. See the following example code:
    // top level port
    output 	ddr_inst1_CFG_SCL_IN,
    output 	ddr_inst1_CFG_SDA_IN,
    input 	 ddr_inst1_CFG_SDA_OEN,
    
    // assignment
    assign ddr_inst1_CFG_SDA_OEN_workaround = ddr_inst1_CFG_SDA_OEN;
    assign ddr_inst1_CFG_SDA_IN = system_i2c_2_io_sda_write && ddr_inst1_CFG_SDA_OEN_workaround;
    assign ddr_inst1_CFG_SCL_IN = system_i2c_2_io_scl_write;
    
    assign system_i2c_2_io_sda_read 	= system_i2c_2_io_sda_write && ddr_inst1_CFG_SDA_OEN_workaround;
    assign system_i2c_2_io_scl_read 	= system_i2c_2_io_scl_write;
    
    // SoC connection
    .system_i2c_2_io_sda_write          (system_i2c_2_io_sda_write),
    .system_i2c_2_io_sda_read           (system_i2c_2_io_sda_read),
    .system_i2c_2_io_scl_write          (system_i2c_2_io_scl_write),
    .system_i2c_2_io_scl_read           (system_i2c_2_io_scl_read),
  3. Connect the DDR control pins in the Interface Designer's DDR Block Editor.