Boot Sequence: Case A

The following figure shows the interaction of the FPGA, SPI flash, and external memory during booting.

Figure 1. Boot Sequence Diagram

The system starts from the PC's 0xF900_0000, which is the starting address of the on-chip RAM. The bootloader, which reads a larger user application from the SPI flash, is embedded by default.

  1. The PC starts at the system address 0xF900_0000 of the on-chip RAM.
  2. The bootloader starts reading the SPI Flash address 0x38_0000 for the user application.
  3. The bootloader writes the user application to external memory starting from system address 0x0000_1000.
  4. The bootloader finishes reading the user application from the SPI flash.
  5. The PC jumps to system address 0x0000_1000 and starts to execute the user application.
  6. All accesses remain in the external memory space, which is malloc() by default (unless you specify the on-chip RAM space in the software code)
Note: For RISC-V SoC booting from a flash device, the GPIOs for the SPI signals (system_spi_*) should have the Register Option > register set in the Interface Designer. Refer to the IP Manager generated example design to see how you should set up the SPI channel.