Control and Status Registers

Note: Refer to Sapphire RISC-V SoC Data Sheet and Sapphire High-Performance RISC-V SoC Data Sheet for the available Control and Status Registers (CSR).

csr_clear()

Usage csr_clear(csr, val)
Parameters [IN] csr CSR register
[IN] val CSR bit to clear. Set 1 on bit to clear.
Include driver/riscv.h
Description Clear a CSR.
Example 
csr_clear(mie, MIE_MTIE | MIE_MEIE);
// Clear MTIE and MEIE bit in mie CSR

csr_read()

Usage csr_read(csr)
Parameters [IN] csr CSR register
Returns [OUT] 32-bit CSR register data
Include driver/riscv.h
Description Read from a CSR.
Example 
u32 mie = csr_read(mie);
// Read MIE CSR register data in mie variable

csr_read_clear()

Usage csr_read_clear(csr, val)
Parameters [IN] csr CSR register
[IN] val CSR bit to clear. Set 1 on bit to clear.
Returns [OUT] 32-bit CSR register data
Include driver/riscv.h
Description Read the entire CSR register and clear the specified bits indicated by the argument, val.

csr_read_set()

Usage csr_read_set(csr, val)
Parameters [IN] csr CSR register
[IN] val CSR bit to set. Set 1 on bit to set.
Returns [OUT] 32-bit CSR register data
Include driver/riscv.h
Description Read the entire CSR register and set the specified bits indicated by the argument, val.

csr_set()

Usage csr_set(csr, val)
Parameters [IN] csr CSR register
[IN] val CSR bit to set. Set 1 on bit to set.
Include driver/riscv.h
Description Set the specified bits indicated by the argument, val to the CSR.

csr_swap()

Usage csr_swap(csr, val)
Parameters [IN] csr CSR register
[IN] val Value to swap into CSR register.
Returns [OUT] 32-bit CSR register data swapped out
Include driver/riscv.h
Description Swaps values in the CSR.
Example 
u32 val = csr_swap(mtvec, 0x120);
// mtvec CSR will be set to 0 x 120 while the original mtval 
// CSR value will be returned as val.

csr_write()

Usage csr_write(csr, val)
Parameters [IN] csr CSR register
[IN] val Value to write into CSR register.
Include driver/riscv.h
Description Write to a CSR.
Example 
csr_write(mtvec, 0x100);
// Write 0 x 100 to mtvec CSR register

opcode_R()

Usage opcode_R(opcode, func3, func7, rs1, rs2)
Include driver/riscv.h
Description Define an opcode for the custom instruction.
Example 
#define tea_l(rs1, rs2);
opcode_R(CUSTOM0, 0x00, 0x00, rs1, rs2);