Note: The numbers in the floorplan figures indicate the HVIO and HSIO number ranges.
Some packages may not have all HVIO or HSIO pins in the range bonded out. Refer to
the pinout for information on which pins are available in each package.
Floorplan Diagram for FPGAs in V64 and
W64 Packages
Figure 1. Ti60 FPGAs
Floorplan Diagram for FPGAs in F100 and F100S3F2
Packages
Figure 2. Ti35 and Ti60 FPGAs
Floorplan Diagram for FPGAs in F225 and F256 Packages
Figure 3. Ti35 and Ti60 FPGAs
Floorplan Diagram for FPGAs in J361
Packages
Figure 4. Ti90, Ti120, and Ti180 FPGAs
Floorplan Diagram for FPGAs in G400 Packages
Figure 5. Ti90, Ti120, and Ti180 FPGAs
Floorplan Diagram for FPGAs in N441 Packages
Figure 6. Ti85 and Ti135FPGAs
Floorplan Diagram for FPGAs in L484 Packages
Figure 7. Ti90, Ti120, and Ti180 FPGAs
Floorplan Diagram for FPGAs in J484 and M484 Packages
Figure 8. Ti90, Ti120, and Ti180 FPGAs
Ti90 and Ti120 FPGAs are available in the J484 package
only.
Ti180 FPGAs are available in the J484 and M484
packages.
Floorplan Diagram for FPGAs in J484D1 Packages
Figure 9. Ti180 FPGAs
Floorplan Diagram for FPGAs in N484 Packages
Figure 10. Ti165, Ti240,
and Ti375FPGAsFigure 11. Ti85 and Ti135FPGAs