Enable User Status Pin
Titanium FPGAs have a user status pin to indicate that the FPGA has finished configuration and is in user mode. When this pin goes high, the FPGA is in user mode.
Note: This pin is only available for FPGAs that have transceivers.
Refer to Package/Interface Support Matrix.
| Parameter | Choices | Notes |
|---|---|---|
| Enable User Status Control | On, off | Default: off. |
| User Status Pin Name | User defined | Specify the pin name. Efinix recommends using the default. |