Using the SPI Flash Interface

The internal SPI flash memory is 16 Mbits and can hold:

  • 1 uncompressed bitstream or
  • 2 compressed bitstreams (typical designs) or
  • 1 compressed bitstream and user data
Note: The maximum bitstream size for Ti35 and Ti60 FPGAs is about 13.7 Mbits; compression typically reduces the size by about 50%. So you have about half of the flash left over for user data if you only store one compressed bitstream.

If you want to use the internal SPI flash memory to store user data, you need to add the SPI flash interface block to your interface design. Simply add the block, choose the resource, and specify the instance and pin names. Then, connect the pins to your user design. Only use the SPI flash interface block to communicate with the internal SPI flash memory in user mode; you do not use this block for external flash devices.

Important: You do not need to use the SPI flash interface block if you are only using the internal SPI flash for storing bitstreams.

The following table lists the SPI flash interface block and the internal SPI flash memory signals with the default resource assignments.

Table 1. SPI Flash Resource Assignments
SPI Flash Interface Signal SPI Flash Signal F100S3F2 Package Resource Assignment
SCLK SCK GPIOL_N_01_CCK
MOSI SI GPIOL_P_03_CDI0
MISO SO GPIOL_N_03_CDI1
WP_N WP# –1
HOLD_N HOLD# –1
CS_N CS# GPIOL_P_01_SSL_N
1 WP_N and HOLD_N signals are not bonded out.