Design Check: RISC-V Messages

When you check your design, the Interface Designer applies design rules to your configuration settings. The following tables show some of the error messages you may encounter and explains how to fix them.

qcrv32_rule_axi_master_empty_pins (error)

Message Empty pin names found: <Pin description names>
To fix You need to specify the pin names.

qcrv32_rule_axi_master_invalid_pins (error)

Message Invalid pin names found: <pin description names>
To fix Valid characters are alphanumeric characters with dash and underscore only.

qcrv32_rule_base_empty_pins (error)

Message Empty pin names found: <Pin description names>
To fix You need to specify the pin names.

qcrv32_rule_base_invalid_pins (error)

Message Invalid pin names found: <pin description names>
To fix Valid characters are alphanumeric characters with dash and underscore only.

qcrv32_rule_custom_instr_empty_pins (error)

Message Empty pin names found: <Pin description names>
To fix You need to specify the pin names.

qcrv32_rule_custom_instr_invalid_pins (error)

Message Invalid pin names found: <pin description names>
To fix Valid characters are alphanumeric characters with dash and underscore only.

qcrv32_rule_inst_name (error)

Message Instance name is empty.
To fix You need to specify the pin names.
Message Valid characters are alphanumeric characters with dash and underscore only.
To fix You need to specify valid characters only.

qcrv32_rule_jtag_empty_pins (error)

Message Empty pin names found: <Pin description names>
To fix You need to specify the pin names.

qcrv32_rule_jtag_invalid_pins (error)

Message Invalid pin names found: <pin description names>
To fix Valid characters are alphanumeric characters with dash and underscore only.

qcrv32_rule_mem_clk_resource (error)

Message Memory Clock source is not configured
To fix Assign a Memory Clock Source for the QCRV32 instance.
Message PLL(<PLL Resource Name>) driving QCRV32's memory clock is not configured
To fix You get this message if you did not create a PLL instance to drive the RISC-V memory clock source. Instantiate the correct PLL and clockout according to the memory clock source you use.
Message PLL(<PLL Resource Name>).CLKOUT<number> driving QCRV32's memory clk is not configured
To fix You get this message if you did not use the correct clockout of the PLL instance driving the RISC-V memory clock source. Instantiate the correct clockout according to the memory clock source you use.

qcrv32_rule_mem_clk_resource (warning)

Message The memory clock frequency exceeds the maximum specification of {max_freq} MHz.
To fix The maximum frequency depends on the device, timing model, and pipeline setting (Quad-Core RISC-V block > Clock/Control tab > Enable the pipeline for SoC AXI memory interface). Refer to the "DC and Switching Characteristics" topic in the data sheet for the maximum frequency.

qcrv32_rule_ocr_file (error)

Message On-Chip-RAM file: <ocr_file_path> not exist
To fix Add the file by clicking the On-Chip RAM Configuration file add file button in the Base tab of the Quad-Core RISC-V instance.
Message Invalid On-Chip-RAM file format, only support intel hex/ bin
To fix The On-Chip-RAM file format must be a .hex or a .bin file only.
Message File too large, max size is {MAX_FILE_BYTES} bytes, got = {User file size}
To fix The On-Chip-RAM file size must not be more than {MAX_FILE_BYTES}.
Message Invalid Intel Hex record: <Detail message about error on line xxx>
To fix The .hex file is corrupted. Choose a different file.

qcrv32_rule_resource (error)

Message Resource is not a valid QCRV32 device instance.
To fix Choose a resource in SOC Resource that exists in the device.

qcrv32_rule_sys_clk_resource (error)

Message System Clock source is not configured
To fix Assign a resource in System Clock Source > Quad-Core RISC-V block > Clock/Control tab that exists in the device.
Message PLL(<PLL Resource Name>) driving QCRV32's system clock is not configured
To fix You get this message if you did not create a PLL instance to drive the RISC-V system clock source. Instantiate the correct PLL and clockout according to the system clock source you use.
Message PLL(<PLL Resource Name>).CLKOUT<number> driving QCRV32's system clk is not configured
To fix You get this message if you did not use the correct clockout of the PLL instance driving the RISC-V system clock source. Instantiate the correct clockout according to the system clock source you use.

qcrv32_rule_sys_clk_resource (warning)

Message The system clock frequency exceeds the maximum specification of {max_freq} MHz.
To fix The maximum frequency depends on the device, timing model, and pipeline setting (Quad-Core RISC-V block > Clock/Control tab > Enable the pipeline for SoC AXI memory interface). Refer to the "DC and Switching Characteristics" topic in the data sheet for the maximum frequency.

qcrv32_rule_pll_non_frac (error)

Message PLL {pll_inst_name} driving QCRV32 should disable fractional mode
To fix Disable fractional mode for the PLL instance driving the QCRV32 instance's clock source.
Message Found {number of pins} QCRV32 pin driven by PLL in fractional mode: {Pin names}
To fix Disable fractional mode for the PLL instance driving those pins connected to QCRV32 instance's AXI, periphery, or JTAG clock input.