When you check your design, the Interface Designer applies design rules to your
HyperRAM settings. The following tables show some of the error and warning messages
you may encounter and explains how to fix them.
hyper_ram_rule_cali_clk_dyn_phase_shift (error)
| Message |
Dynamic Phase Shift should be enabled in the PLL
(<pll_inst.name>:CLKOUT<pll_clk_idx>) that drives the HyperRAM's
Calibration Clock |
| To fix |
Enable the Dynamic Phase Shift in the PLL and the PLL output clock that
drives the Calibration Clock. |
hyper_ram_rule_cali_clk_phase_shift_coverage (warning)
| Message |
The recommended phase shift step for the Calibration Clock is 45
degrees. Current: <phase_shift_step> degrees. |
| To fix |
Update the PLL settings so the step for the dynamic phase shift in
Calibration Clock has 45 degree phase coverage. The formula to calculate a
single phase shift step coverage is given by: Single phase step
coverage = (0.5 x Post Divider (O) x Final Clock Out) / VCO
Frequency x
360 |
hyper_ram_rule_cali_clk_pll (error)
| Message |
Calibration Clock is not driven by PLL |
| To fix |
Update the PLL settings such that the Calibration Clock is driven by a
PLL. |
|
|
| Message |
Calibration Clock and Controller Clock must have identical
frequency |
| To fix |
Update the PLL settings such that the Controller Clock and Calibration
Clock have the same frequency. |
hyper_ram_rule_clk_freq (error)
| Message |
Clock signals: <Clock Names> driving HyperRAM must have frequencies
less than or equal to 250 MHz. |
| To fix |
Update the PLL settings to reduce the frequency of the clocks driving
the HyperRAM. |
hyper_ram_rule_drive_strength (error)
| Message |
The following drive strength are invalid: <list of invalid drive
strength params> |
| To fix |
Choose or specify a valid drive strength. See Table 1. |
hyper_ram_rule_empty_pins (error)
| Message |
Empty pin names found: <list> |
| To fix |
Specify the missing pin names in the list. |
hyper_ram_rule_instance_count (error)
| Message |
There can only be one HyperRAM instance |
| To fix |
You get this error when you create more than one HyperRAM
instance. |
hyper_ram_rule_invalid_pins (error)
| Message |
Invalid pin names found |
| To fix |
The pin name you entered has illegal characters. Rename the
pin. |
hyper_ram_rule_pll_clk (warning)
| Message |
Phase shift relationship between Controller Clock and Phase-Shifted
Clock is not guaranteed when they don't come from PLL |
| To fix |
You get this error when either Controller Clock or Phase-Shifted Clock
is not coming from PLL. Update the PLL settings such that both Controller
Clock and Phase-Shifted Clock comes from PLL |
hyper_ram_rule_pll_clk (error)
| Message |
Controlled Clock and Phase-Shifted Clock cannot be the same |
| To fix |
Specify different names for the Controller Clock and Phase-Shifted
Clock. |
|
|
| Message |
Controller Clock and Phase-Shifted Clock should connect to the same PLL
instance |
| To fix |
Connect the Controller Clock and Phase-Shifted Clock to the same PLL
instance. |
|
|
| Message |
Invalid phase shift difference: <phase_diff> between CLK90:
<shifted_clk_degree> and CLK: <ctrl_clk_degree>) (Expected 90
degrees) |
| To fix |
Update the PLL settings such that the phase shift difference between
Controller Clock and Phase-Shifted Clock is 90 degree. |
|
|
| Message |
Controller Clock and Phase-Shifted Clock must have identical
frequency |
| To fix |
Update the PLL settings such that the Controller Clock and Phase
Shifted Clock have the same frequency. |
hyper_ram_rule_resource (error)
| Message |
Resource name is empty |
| To fix |
The HyperRAM resource name. |
|
|
| Message |
Resource is not a valid HyperRAM device instance |
| To fix |
Choose the HyperRAM resource. |