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Introduction
Features
Device Support
Resource Utilization and Performance
Release Notes
Functional Description
Ports
Register List
cfg_identifier (0x0000)
reg_user_max_payload (0x0004)
reg_user_max_read_req (0x0008)
reg_write_timeout (0x000C)
msi_enable and msix_enable (0x0018)
max_payload (0x001C)
max_read_req (0x0020)
clk_pciew (0x0024)
dsc_identifier (0x1000)
dsc_crd_en (0x1004)
dsc_stop (0x100C)
dsc_restart (0x1018)
irq_identifier (0x2000)
user_irq (0x2004)
dma_irq (0x2008)
user_irq_i (0x200C)
dma_irq_i (0x2010)
user_irq_lut (0x2014)
user_irq_lut (0x2018)
user_irq_lut (0x201C)
user_irq_lut (0x2020)
dma_irq_lut (0x2024)
dma_irq_lut (0x2028)
user_en (0x202C)
dma_en (0x2038)
htc_identifier (0x3000)
htc_dsc_adj (0x3004)
htc_dsc_crd (0x3008)
htc_dsc_addr_l (0x300C)
htc_dsc_addr_h (0x3010)
htc_dma_wb_addr_l (0x3014)
htc_dma_wb_addr_h (0x3018)
htc_dma_ctl (0x301C)
htc_dma_status (0x3028)
htc_dma_dsc_compl_cnt (0x3030)
htc_dma_intr_mask (0x3038)
cth_identifier (0x4000)
cth_dsc_adj (0x4004)
cth_dsc_crd (0x4008)
cth_dsc_addr_l (0x400C)
cth_dsc_addr_h (0x4010)
cth_dma_wb_addr_l (0x4014)
cth_dma_wb_addr_h (0x4018)
cth_dma_ctl (0x401C)
cth_dma_status (0x4028)
cth_dma_dsc_compl_cnt (0x4030)
cth_dma_intr_mask (0x4038)
MSI-X/MSI Interrupt Vector Table (0x8000)
Descriptors
AXI4-MM Bypass Master
AXI4-Stream Data Interface
APB3 Configuration Interface
Customizing the PCIe SGDMA
Software Driver
PCIe SGDMA Example Design
PCIe SGDMA Testbench
Revision History
PCIe SGDMA Testbench
Notice:
Contact your nearest AE for support.