htc_dma_dsc_compl_cnt (0x3030)
| Bit(s) | Default | Access | Description |
|---|---|---|---|
| [31:0] | 32’h0 | RO | Indicates the number of descriptors that have completed data transfer. This register is cleared when the run bit [0] of the control register transitions from 0 to 1. |
| Bit(s) | Default | Access | Description |
|---|---|---|---|
| [31:0] | 32’h0 | RO | Indicates the number of descriptors that have completed data transfer. This register is cleared when the run bit [0] of the control register transitions from 0 to 1. |