dsc_stop (0x100C)
| Bit(s) | Default | Access | Description |
|---|---|---|---|
| 31:20 | – | – | Reserved |
| 19:16 | 4’h0 | RW | Pause control bits for the descriptor engine to stop fetching descriptors from CTH engines. One bit per CTH channel; setting a bit high pauses fetching, setting it low resumes operation. |
| 15:4 | – | – | Reserved |
| 3:0 | 1’h0 | RW | Pause control bits for the descriptor engine to stop fetching descriptors from HTC engines. One bit per HTC channel; setting a bit high pauses fetching, setting it low resumes operation. |