XGMII RX

Every incoming RX Ethernet frame from the FPGA Ethernet 10G PCS is decoded based on PREAMBLE, IDLE, and TERMINATE octets. Every RX frame is checked for the following criteria:
  • Physical frame length
  • FCS check
  • Error frame
  • Pause frame
  • Address or broadcast filtering

More details on RX frame handling are described in Erroneous RX Frame, Address Filtering and Broadcast Filtering at RX, and Decoding Pause Frame at RX.

Generally, at the RX, the Ethernet 10G MAC core decodes XGMII_RXD and XGMII_RXC, and outputs them at the RX AXI ST interface. The Ethernet 10G MAC core is capable of decoding XGMII packets with IPG ≥ 5 octets and handling PREAMBLE starting at either Octet 0 or Octet 4. For the Ethernet frames that start at Octet 4, the Ethernet 10G MAC core realigns the data streaming so that RX_AXI_TKEEP starts with FF.

Figure 1. Conversion from XGMII RX to RX AXI ST
Important: With reference to the 10G Ethernet protocol, the minimum RX IPG is 5. XGMII RX Packet with < 5 octets of IPG, especially when the RX IPG are occupying octet4, octet5, octet6 and octet7, causes the Ethernet 10G MAC core to incorrectly decode PREAMBLE, IDLE and TERMINATE octets, results in incorrect data frames at RX AXI ST 64 interfaces, as illustrated by Figure 2.
Figure 2. Incorrect Decoding when RX IPG < 5