Block Diagram

The Ethernet 10G MAC core or efx_mac10gbe comprises of the following modules:

• Power-up sequence to handshake with the FPGA transceiver.
• AXI ST 64-bit user interface.
• TX engine with CRC generation.
• RX engine with CRC checker.
• XGMII interface.
• Statistics reporting.
• Priority flow control module.
• Broadcast and address filtering.