Introduction

Efinix provides the configurable, cached soft RISC-V SoC, Sapphire, which optionally includes a memory controller interface. The Sapphire SoC supports a variety of peripherals. You can choose which peripherals you want by configuring the SoC in the Efinity® IP Manager. This core is similar to the open-source SaxonSOC, but it has been optimized for Titanium and Trion® FPGAs.

Important: You should use the Sapphire SoC for all new designs; the Ruby, Jade, and Opal SoCs are end of life with the Efinity® software v2022.1.

Table 1. SoC Version Compatibility
Efinity Version	SoC Version	Notes
2021.1 (and all patches)	1.x	Initial version with limited feature set. You can continue to use this version with the Efinity software v2021.1.
2021.2 and higher (and all patches)	2.0 and higher	Enhanced version with additional features, such as custom instructions, floating point unit, Linux memory managemet unit, optional RISC-V extensions (atomic and compressed), and up to 3 user timers. This version is not backwards compatible with v1.x. Use this version for all new designs.

Figure 1. Sapphire RISC-V SoC Design Flow

Notice: For details on developing RTL designs or creating software, refer to the Sapphire RISC-V SoC Hardware and Software User Guide.