tsuData Register: 0x0000_0030
| 31 | 6 | 5 | 0 | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Reserved | value | ||||||||||||||||||
| Bits | Field | Description | Privilege |
|---|---|---|---|
| 0-5 | value | Data setup time. The number of clock cycles should SDA hold its state
before the rising edge of SCL. The clock cycle refers to
FCLK. |
Write |
| 6-31 | Reserved | Reserved. | N/A |
