Interrupt Register: 0x0000_000C
| 31 | 17 | 16 | 15 | 10 | 9 | 8 | 7 | 2 | 1 | 0 | |||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Reserved | cmdValid | Reserved | rspInt | cmdInt | Reserved | rspIntEnable | cmdIntEnable | ||||||||||||
| Bits | Field | Description | Privilege |
|---|---|---|---|
| 0 | cmdIntEnable | Flag interrupt when Cmd FIFO is empty. 1'b1:
Enable 1'b0: Disable |
Read/Write |
| 1 | rspIntEnable | Flag interrupt when Rsp FIFO not empty interrupt enable. 1'b1:
Enable 1'b0: Disable |
Read/Write |
| 2-7 | Reserved | Reserved. | N/A |
| 8 | cmdInt | Cmd FIFO interrupt status. 1'b1: Interrupt
flagged 1'b0: Interrupt not flagged |
Read |
| 9 | rspInt | Rsp FIFO interrupt status. 1'b1: Interrupt
flagged 1'b0: Interrupt not flagged |
Read |
| 10-15 | Reserved | Reserved. | N/A |
| 16 | cmdValid | Cmd FIFO is not empty. | Read |
| 17-31 | Reserved | Reserved. | N/A |