Efinix, Inc.
  • Introduction
  • Features
  • Device Support
  • Resource Utilization and Performance
  • Release Notes
  • Functional Description
    • Ports
    • AXI User Interface
      • AXI Addressing
      • Unaligned Address Access
      • AXI Read and Write Operation
    • Native User Interface
    • PLL Auto Calibration Flow
    • Periodic Recalibration Flow
    • On-Demand Calibration
    • PLL Manual Calibration Flow
    • HyperRAM Controller Operation
    • Dynamic Reconfiguration for Configuration Register
    • Configuration Register
      • Configuration Register 0
      • Configuration Register 1
  • Interface Designer Settings
    • PLL Auto Calibration and PLL Manual Calibration
  • IP Manager
  • Customizing the HyperRAM Controller
  • HyperRAM Controller Example Design
    • Virtual I/O Debugger Settings
  • HyperRAM Controller Testbench
  • Revision History

AXI User Interface

  • AXI Addressing
  • Unaligned Address Access
  • AXI Read and Write Operation
Parent topic: Functional Description

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