Asynchronous FIFO Operation
With an asynchronous FIFO, the two protocols can work in their respective clock domains
and still transfer reliable data to each other. When there is a write or read request
affecting its own respective domain’s flags, the asynchronous FIFO has 0 delays. Whereas
when affecting the other domain’s flags, it has a 1 clock cycle delay from its
respective domain plus 2 clock cycles of the other domain. For example, a write request
only reflects on the read domain after 1 write clock cycle plus 2 read clock cycles and
vice versa. Enabling the PIPELINE_REG adds 1 more additional clock
cycle of the other domain on top of it. Refer to the latency table for asynchronous FIFO
in Asynchronous FIFO for more info.
For asynchronous FIFO, a write operation affecting the write domain flags and a read operation affecting the read domain flags have the same behavior as the synchronous FIFO except when they are affecting crossed domain flags. The following examples emphasize the cross-clock domain flags update latency.
Standard Mode
The following figures show examples of asynchronous FIFO standard mode with a faster read clock and write clock, respectively. The waveforms show the FIFO written until full and a few read requests afterwards.
In the read example shown in Figure 2, the read clock frequency is double that of the write clock with
the same phase. When there is a write request at node 1, empty_o
does not deassert immediately; instead, it deasserts 1 write clock plus 2 read
clocks later at node 6. Similarly, almost_empty_o deasserts at node
8, which is 1 write clock plus 2 read clocks later after the second write request at
node 4. almost_full_o and full_o deassert at the
same time at node 21 because there are 2 read requests detected before the write
domain is synchronized at node 20.
In the write example shown in Figure 4, the write clock frequency is double that of the read clock with
the same phase. The empty_o deasserts at node 6 and
almost_empty_o deasserts at node 8. Each of these signals are
affected by write requests on node 1 and node 2 respectively. Read requests at node
10 and 12 reflect on the write domain at node 16 and 18, respectively.
FWFT Mode
The following figures show example of asynchronous FIFO FWFT mode with faster read clock and faster write clock. Both examples have the similar read request to write flags update behavior as their standard mode counterpart.
In the example shown in Figure 6, the read
clock frequency is double that of the write clock with the same phase. When there is
a write request at node 3, empty_o does not deassert immediately;
instead, it deasserts 1 write clock plus 2 read clocks later at node 7, .
Concurrently, the empty_o deasserts, the first data falls through
the FIFO onto rdata, and the rd_valid_o is
asserted. Similarly almost_empty_o needs 1 write clocks plus 2 read
clocks to deasserts at node 9, after the second write request at node 5. Subsequent
read request outputs the next available word inside FIFO.
In the example shown in Figure 8, the
write clock frequency is double that of the read clock with the same phase. Between
positive edges of read clock at node 2 and node 4, 2 write requests are detected at
the same time. The empty_o and almost_empty_o deasserts 2 write clocks plus 1 read
clock later at node 6 and node 8 respectively. The first word falls through at the
same time as empty_o is deasserted and rd_valid_o
is asserted. Always refer to empty_o instead of
datacount_o value whenever you want to do a read request. Refer
to the Datacount for more
information about the datacount_o signal.
