Control and Status Registers
The following table shows the supported privileged and unprivileged machine-level CSR.
| Address | Register Name | Attribute | Hardware Requirement |
|---|---|---|---|
| 0x001 | FFLAGS | URW | F or D extension enabled. |
| 0x002 | FRM | URW | F or D extension enabled. |
| 0x003 | FCSR | URW | F or D extension enabled. |
| 0x100 | SSTATUS | SRW | Supervisor mode enabled. |
| 0x104 | SIE | SRW | Supervisor mode enabled. |
| 0x105 | STVEC | SRW | Supervisor mode enabled. |
| 0x106 | SCOUNTEREN | SRW | Supervisor mode enabled. |
| 0x10A | SENVCFG | SRW | Supervisor mode enabled. |
| 0x140 | SSCRATCH | SRW | Supervisor mode enabled. |
| 0x141 | SEPC | SRW | Supervisor mode enabled. |
| 0x142 | SCAUSE | SRW | Supervisor mode enabled. |
| 0x143 | STVAL | SRW | Supervisor mode enabled. |
| 0x144 | SIP | SRW | Supervisor mode enabled. |
| 0x180 | SATP | SRW | MMU enabled. |
| 0x300 | MSTATUS | MRW | – |
| 0x301 | MISA | MW | – |
| 0x302 | MEDELEG | MRW | – |
| 0x303 | MIDELEG | MRW | – |
| 0x304 | MIE | MRW | – |
| 0x305 | MTVEC | MRW | – |
| 0x306 | MCOUNTEREN | MRW | – |
| 0x30A | MENVCFG | MRW | Supervisor mode enabled. |
| 0x31A | MENVCFGH | MRW | Supervisor mode enabled. |
| 0x320 | MCOUNTINHIBIT | MRW | Performance counter enabled. |
| 0x32C | MHPMEVENT12 | MRW | Performance counter enabled. |
| 0x32D | MHPMEVENT13 | MRW | Performance counter enabled. |
| 0x32E | MHPMEVENT14 | MRW | Performance counter enabled. |
| 0x32F | MHPMEVENT15 | MRW | Performance counter enabled. |
| 0x330 | MHPMEVENT16 | MRW | Performance counter enabled. |
| 0x331 | MHPMEVENT17 | MRW | Performance counter enabled. |
| 0x332 | MHPMEVENT18 | MRW | Performance counter enabled. |
| 0x333 | MHPMEVENT19 | MRW | Performance counter enabled. |
| 0x334 | MHPMEVENT20 | MRW | Performance counter enabled. |
| 0x335 | MHPMEVENT21 | MRW | Performance counter enabled. |
| 0x336 | MHPMEVENT22 | MRW | Performance counter enabled. |
| 0x337 | MHPMEVENT23 | MRW | Performance counter enabled. |
| 0x338 | MHPMEVENT24 | MRW | Performance counter enabled. |
| 0x339 | MHPMEVENT25 | MRW | Performance counter enabled. |
| 0x33A | MHPMEVENT26 | MRW | Performance counter enabled. |
| 0x33B | MHPMEVENT27 | MRW | Performance counter enabled. |
| 0x33C | MHPMEVENT28 | MRW | Performance counter enabled. |
| 0x33D | MHPMEVENT29 | MRW | Performance counter enabled. |
| 0x33E | MHPMEVENT30 | MRW | Performance counter enabled. |
| 0x33F | MHPMEVENT31 | MRW | Performance counter enabled. |
| 0x340 | MSCRATCH | MRW | – |
| 0x341 | MEPC | MRW | – |
| 0x342 | MCAUSE | MRW | – |
| 0x343 | MTVAL | MRW | – |
| 0x344 | MIP | MRW | – |
| 0x3A0 | PMPCFG | MRW | Physical memory protection enabled. |
| 0x3B0 | PMPADDR0 | MRW | Physical memory protection enabled. |
| 0x3B1 | PMPADDR1 | MRW | Physical memory protection enabled. |
| 0x3B2 | PMPADDR2 | MRW | Physical memory protection enabled. |
| 0x3B3 | PMPADDR3 | MRW | Physical memory protection enabled. |
| 0x3B4 | PMPADDR4 | MRW | Physical memory protection enabled. |
| 0x3B5 | PMPADDR5 | MRW | Physical memory protection enabled. |
| 0x3B6 | PMPADDR6 | MRW | Physical memory protection enabled. |
| 0x3B7 | PMPADDR7 | MRW | Physical memory protection enabled. |
| 0x7A0 | TSELECT | MRW | Debug CSR. |
| 0x7A1 | TDATA1 | MRW | Debug CSR. |
| 0x7A2 | TDATA2 | MRW | Debug CSR. |
| 0x7A4 | TINFO | MRW | Debug CSR. |
| 0x7B0 | DCSR | MRW | Debug CSR. |
| 0x7B1 | DPC | MRW | Debug CSR. |
| 0x7FF | CUSTOM, DATA PREFETCH | MRW | Custom hardware prefetcher enabled. |
| 0xB00 | MCYCLE | MRW | Performance counter enabled. |
| 0xB02 | MINSTRET | MRW | Performance counter enabled. |
| 0xB03 | MHPMCOUNTER3 | MRW | Performance counter enabled. |
| 0xB04 | MHPMCOUNTER4 | MRW | Performance counter enabled. |
| 0xB05 | MHPMCOUNTER5 | MRW | Performance counter enabled. |
| 0xB06 | MHPMCOUNTER6 | MRW | Performance counter enabled. |
| 0xB07 | MHPMCOUNTER7 | MRW | Performance counter enabled. |
| 0xB08 | MHPMCOUNTER8 | MRW | Performance counter enabled. |
| 0xB09 | MHPMCOUNTER9 | MRW | Performance counter enabled. |
| 0xB0A | MHPMCOUNTER10 | MRW | Performance counter enabled. |
| 0xB0B | MHPMCOUNTER11 | MRW | Performance counter enabled. |
| 0xB0C | MHPMCOUNTER12 | MRW | Performance counter enabled. |
| 0xB0D | MHPMCOUNTER13 | MRW | Performance counter enabled. |
| 0xB0E | MHPMCOUNTER14 | MRW | Performance counter enabled. |
| 0xB0F | MHPMCOUNTER15 | MRW | Performance counter enabled. |
| 0xB10 | MHPMCOUNTER16 | MRW | Performance counter enabled. |
| 0xB11 | MHPMCOUNTER17 | MRW | Performance counter enabled. |
| 0xB12 | MHPMCOUNTER18 | MRW | Performance counter enabled. |
| 0xB13 | MHPMCOUNTER19 | MRW | Performance counter enabled. |
| 0xB14 | MHPMCOUNTER20 | MRW | Performance counter enabled. |
| 0xB15 | MHPMCOUNTER21 | MRW | Performance counter enabled. |
| 0xB16 | MHPMCOUNTER22 | MRW | Performance counter enabled. |
| 0xB17 | MHPMCOUNTER23 | MRW | Performance counter enabled. |
| 0xB18 | MHPMCOUNTER24 | MRW | Performance counter enabled. |
| 0xB19 | MHPMCOUNTER25 | MRW | Performance counter enabled. |
| 0xB1A | MHPMCOUNTER26 | MRW | Performance counter enabled. |
| 0xB1B | MHPMCOUNTER27 | MRW | Performance counter enabled. |
| 0xB1C | MHPMCOUNTER28 | MRW | Performance counter enabled. |
| 0xB1D | MHPMCOUNTER29 | MRW | Performance counter enabled. |
| 0xB1E | MHPMCOUNTER30 | MRW | Performance counter enabled. |
| 0xB1F | MHPMCOUNTER31 | MRW | Performance counter enabled. |
| 0xC00 | UCYCLE | URO | Performance counter enabled. |
| 0xC02 | UINSTRET | URO | Performance counter enabled. |
| 0xB03 | HPMCOUNTER3 | URO | Performance counter enabled. |
| 0xB04 | HPMCOUNTER4 | URO | Performance counter enabled. |
| 0xB05 | HPMCOUNTER5 | URO | Performance counter enabled. |
| 0xB06 | HPMCOUNTER6 | URO | Performance counter enabled. |
| 0xB07 | HPMCOUNTER7 | URO | Performance counter enabled. |
| 0xB08 | HPMCOUNTER8 | URO | Performance counter enabled. |
| 0xB09 | HPMCOUNTER9 | URO | Performance counter enabled. |
| 0xB0A | HPMCOUNTER10 | URO | Performance counter enabled. |
| 0xB0B | HPMCOUNTER11 | URO | Performance counter enabled. |
| 0xB0C | HPMCOUNTER12 | URO | Performance counter enabled. |
| 0xB0D | HPMCOUNTER13 | URO | Performance counter enabled. |
| 0xB0E | HPMCOUNTER14 | URO | Performance counter enabled. |
| 0xB0F | HPMCOUNTER15 | URO | Performance counter enabled. |
| 0xB10 | HPMCOUNTER16 | URO | Performance counter enabled. |
| 0xB11 | HPMCOUNTER17 | URO | Performance counter enabled. |
| 0xB12 | HPMCOUNTER18 | URO | Performance counter enabled. |
| 0xB13 | HPMCOUNTER19 | URO | Performance counter enabled. |
| 0xB14 | HPMCOUNTER20 | URO | Performance counter enabled. |
| 0xB15 | HPMCOUNTER21 | URO | Performance counter enabled. |
| 0xB16 | HPMCOUNTER22 | URO | Performance counter enabled. |
| 0xB17 | HPMCOUNTER23 | URO | Performance counter enabled. |
| 0xB18 | HPMCOUNTER24 | URO | Performance counter enabled. |
| 0xB19 | HPMCOUNTER25 | URO | Performance counter enabled. |
| 0xB1A | HPMCOUNTER26 | URO | Performance counter enabled. |
| 0xB1B | HPMCOUNTER27 | URO | Performance counter enabled. |
| 0xB1C | HPMCOUNTER28 | URO | Performance counter enabled. |
| 0xB1D | HPMCOUNTER29 | URO | Performance counter enabled. |
| 0xB1E | HPMCOUNTER30 | URO | Performance counter enabled. |
| 0xB1F | HPMCOUNTER31 | URO | Performance counter enabled. |
| 0xDB0 | STOPI | SRO | Supervisor mode enabled. |
| 0xF11 | MVENDORID | MRO | – |
| 0xF12 | MARCHID | MRO | – |
| 0xF13 | MIMPID | MRO | – |
| 0xF14 | MHARTID | MRO | – |
| 0xFB0 | MTOPI | MRO | – |