Supervisor Address Translation Protection Register (satp): 0x180

The satp register is a 32-bit register, which controls supervisor mode address translation and protection. This register holds the physical page number (PPN) of the root page table. For example, its supervisor physical address divided by 4KB; an address space identifier (ASID) that facilitates address translation fences on a per-address-space basis; and the MODE field that elects the current address translation scheme.

31	30					22	21					0
MODE	ASID						PPN

Bits	Field	Description	Single/Multi-Core	w/FPU	w/MMU
0-21	PPN	Physical page number.	N/A	N/A	Read/Write
22-30	ASID	Address space identifier.	N/A	N/A	Read/Write
31	MODE	1'b1: Page-based 32-bits virtual processing. 1'b0: No translation or protection.	N/A	N/A	Read/Write