Clocks

Table 1. Clock Ports
Port Direction Description
io_systemClock Input Provides up to I GHz clock for the SoC.
io_peripheralClock Input Provides up to 250 MHz clock for the APB3 peripherals and AXI4 master.
io_memoryClock Input Provides up to 250 MHz clock for the external memory bus.
io_ddrMaster_0_clk Input Provides up to 250 MHz clock for the AXI slave bus.
io_cfuClk Input Provides up to 250 MHz clock for the custom instruction bus.