Machine Status Register (mstatus): 0x300

The mstatus register is a 13-bits read/write register formatted. The mstatus register keeps track of and controls the hart’s current operating state. Restricted views of the mstatus register appear as the sstatus and ustatus registers in the S-level and U-level ISAs, respectively.

31 30 20 19 18 17 16 15 14 13 12 11 10 8 7 6 4 3 2 1 0
SD Reserved MXR SUM MPRV Reserved FS MPP Reserved MPIE Reserved MIE Reserved SIE Reserved
Bits Field Description Single/Multi-Core w/FPU w/MMU
0 Reserved Reserved. N/A N/A N/A
1 SIE Machine global interrupt enable register. N/A N/A Read/Write
2 Reserved Reserved. N/A N/A N/A
3 MIE Machine interrupt enable register. Read/Write Read/Write Read/Write
4-6 Reserved Reserved. N/A N/A N/A
7 MPIE Machine previous interrupt enable. Read/Write Read/Write Read/Write
8-10 Reserved Reserved. N/A N/A N/A
11-12 MPP Machine previous privilege mode. Read/Write Read/Write Read/Write
13-14 FS Status of the floating-point unit.
2'b00: Off
2'b01: Initial
2'b10: Clean
2'b11: Dirty
 N/A Read N/A
15-16 Reserved Reserved. N/A N/A N/A
17 MPRV Modifies the privilege level that loads and stores the executables.
1'b1: Load and store memory address are translated and protected
1'b0: Normal mode
 N/A N/A Read/Write
18 SUM Modifies the privilege with which S-mode loads and stores access virtual memory.
1'b1: Access permitted
1'b0: S-mode memory accesses to pages that are accessible by U-mode will fault
 N/A N/A Read/Write
19 MXR Modifies the privilege that loads access virtual memory.
1'b1: Loads from pages marked with either readable or executable will succeed
1'b0: Only loads from pages marked readable will succeed
 N/A N/A Read/Write
20-30 Reserved Reserved. N/A N/A N/A
31 SD Indicates the presence of FS field with dirty state that requires saving extended user context to memory. N/A Read N/A