Match Trace Lengths

High-speed differential signals should be routed symmetrically. Always keep route signals in parallel with a constant distance between two traces. This distance is required to achieve the specified differential pair impedance. The following figures provide examples of correct and incorrect traces. The different trace colours indicate different PCB layers.

Figure 1. Route Differential Pairs Symmetrically and Always Keep Signals Parallel

Figure 2. Do Not Place Components or Vias between Differential Pairs

Figure 4. Route Pairs on the Same Layer with the Same Number of Vias

Signal speeds are different on different layers. For interfaces that require tight matching between signal pairs and the clock pair, route all the data and clock signals on the same layers.

Figure 5. Route Pairs from the Same Interface on the Same Layer

Add length correction near the mismatching point to ensure the differential pair signals are propagated synchronously over most of the connections.

Figure 6. Add Length Correction near the Mismatching Point