Resource Utilization and Performance
Note: The resources and performance values provided are based on some
of the supported FPGAs. These values are just guidance and may change depending on the
device resource utilization, design congestion, and user design.
| FPGA | Logic Utilization (LUTs) | Memory Blocks | fMAX (MHz)1 | Efinity® Version | |||
|---|---|---|---|---|---|---|---|
| Native | AXI4 | Native | AXI4 | Native | AXI4 | ||
| T8 QFP144 C4 | 649 | 678 | 0 | 2 | 116.5 | 106.4 | 2019.3 |
| T20 BGA256 C4 | 121.3 | 113.18 | |||||
| T85 BGA484 C4 | 113.4 | 114.50 | |||||
| T120 BGA484 C4 | 113.4 | 114.50 | |||||
1 Using
default parameter settings.
2 Using Verilog HDL.