Revision History
| Date | Version | Description |
|---|---|---|
| ?? | ?? |
Added Device Support and release notes sections. (DOC-1234)
|
| February 2023 | 2.4 | Added note about the resource and performance values in the resource and utilization table are for guidance only. |
| August 2022 | 2.3 | Added i_AXI4_WSTRB and
Corrected
i_addr, i_din, and
o_dout port widths. |
| October 2021 | 2.2 | Added note to state that the fMAX in Resource Utilization and Performance, and Example Design Implementation tables were based on default parameter settings. |
| June 2021 | 2.1 | Added note about including all .v generated in testbench folder is required for simulation. |
| December 2020 | 2.0 |
Updated user guide for Efinix® IP Manager
which includes added IP Manager topics, updated parameters, and user
guide structure.
|
| October 2020 | 1.4 | Removed dummy signals from AXI4 ports. (DOC-320) Updated
i_AXI4_AWADDR, i_AXI4_ARADDR and i_AXI4_AWLEN ports description.
(DOC-320) |
| July 2020 | 1.3 | Updated example design description. Added note to fsys_mhz and
fck_mhz parameter to state that other values can be used but not
tested by Efinix®. |
| May 2020 | 1.2 |
Removed T4 BGA81 C2 FPGA from resource utilization and performance
table.
Updated description for fsys_mhz and fck_mhz parameters.
Updated value range for fsys_mhz, fck_mhz, tRC, tRCD, tREF, tRFC,
and tRP.
|
| April 2020 | 1.1 |
Removed 166 MHz controller clock support from features list.
Added 100 MHz to fck_mhz parameter range.
Removed 133 MHz and 166 MHz from fsys_mhz parameter range.
|
| April 2020 | 1.0 | Initial release. |