Calibrate SDRAM Controller

About this task

Figure 1. Debug Perspective GUI - Logic Analyzer
Select Bitstream Connect Debugger Disconnect Debugger
Start Programming Add Net Remove Net
Stop Programming Select Waveform File

Perform the following steps in the Efinity® Debugger to calibrate the SDRAM manually:

Procedure

  1. Select the bitstream and program your Trion® FPGA.
  2. Click Connect Debugger.
  3. In the Trigger Setup, click Add Net.
  4. Set Valid to rising edge trigger.
  5. Click Run and the waveform is stored in a .vcd file.
  6. Click Select Waveform File to open the waveform file.
    Note: You can view the waveform with GTKWave software. Download and install the GTKWave software from gtkwave.sourceforge.net. Windows: You may need to add the path to GTKWave ($GTKWave_folder$\bin\) to your System Variables path for the software to launch correctly.
  7. Verify if the dout signal is in a counting-up pattern.
  8. You must adjust the tACclk phase shift so the dout signal is in a counting-up pattern. Skip this step if the dout signal is in a counting-up pattern. Try the available Phase Shift (Degree) values in the Interface Designer until dout signal is in a counting-up pattern.
    You can use the Shmoo plot technique to find optimal tACclk signal phase shift value.
  9. Verify that the din and dout signals are aligned.
  10. You must adjust the tIORT parameter to align the din and dout signals. Skip this step if the din and dout signals are aligned. Change the tIORT parameter value between 0 to 7.
    You can use the Shmoo plot technique to find optimal tIORT parameter value.

Results

Figure 2. Correct Calibration Waveform