Functional Description

The SDRAM Controller consists of an AXI4 to native interface translator, an SDRAM controller wrapper, a finite state machine (FSM), and a soft double data-rate block.

The SDRAM Controller core supports the following user interfaces:

  • Native interface
  • AXI4 interface
Tip: For better performance and shorter development time, Efinix recommends that you instantiate the SDRAM Controller core with the native interface.
Figure 1. SDRAM Controller Native Interface System Block Diagram

Figure 2. SDRAM Controller AXI4 Interface System Block Diagram

Data Rate

The SDRAM Controller data rate is calculated using the following formula:

Data rate = fck_mhz / fsys_mhz