Customizing the DDR3 Soft Controller

The core has parameters so you can customize its function. You set the parameters in the General tab of the core's IP Configuration window.

Table 1. Parameters (General Tab)
Parameter	Options	Description
DDR3 Interface	Native, AXI4	Select the DDR3 interface type. Default: AXI4
DDR3 Data Rate	800D, 800E	Select the DDR3 data rate. Default: 800D
DDR3 DQ Width	8, 16	Select the DDR DQ total width. Default: 16
DDR Frequency	100 - 400	Set DDR running speed up in MHz. Default: 400
Column	10, 11, 12	Column address bit width. Value need to be set based on the selected DQ width and memory device size. Refer to the DDR3 SDRAM Addressing section of JEDEC's DDR3 SDRAM specifications for more information. Default: 10
Row	12, 13, 14, 15, 16	Row address bit width. Value need to be set based on the selected DQ width and memory device size. Refer to the DDR3 SDRAM Addressing section of JEDEC's DDR3 SDRAM specifications for more information. Default: 16
Bank	3	Bank address bit width. This value should be set to 3 to align with 8 bank support in DDR3 devices. Default: 3
Rank	1	Number of ranks for reference. This value is fixed.

Table 2. Parameters (MR0 Tab)
Parameter	Options	Description
Burst Length	8	Burst length for reference. This value is fixed.
Read Burst Type	sequential, interleaved	Set the read burst type. Default: sequential
CAS Latency (CL)	5, 6	Set the CAS latency value. Default: 5
DLL Reset	yes	DLL reset function. This value is fixed.
Write Recovery (tWR)	6	Write recovery value. This value is fixed.
Pre-charge Power-down	on	Pre-charge power-down function. This value is fixed.

Table 3. Parameters (MR1 Tab)
Parameter	Options	Description
DLL Enable	true	DLL Enable function. This value is fixed.
Output Drive Strength	rzq/6, rzq/7	Set the output drive strength. Default: rzq/6
Posted CAS Additive Latency (AL)	disable, cl-1, cl-2	Set the posted CAS additive latency value. Default: disable
Write Leveling	disable	Write leveling function. This value is fixed.
Termination Data Strobe (TDQS)	disable	Termination data strobe (TDQS) function. This value is fixed.
Output Enable	enable	Output enable function. This value is fixed.
On-die Termination (ODT) Resistance	disable, rzq/2, rzq/4, rzq/6, rzq/8, rzq/12	Set the dynamic on-die termination (ODT) function. Default: rzq/6

Table 4. Parameters (MR2 Tab)
Parameter	Options	Description
CAS Write Latency (CWL)	5	CAS write latency (CWL) for reference. This value is fixed.
Auto Self Refresh	disable	Auto self refresh function. This value is fixed.
Self Refresh Temperature (SRT)	normal, extended	Set the self refresh temperature (SRT). Default: normal
Dynamic On-die Termination (ODT)	disable, rzq/2, rzq/4	Set the dynamic on-die termination (ODT) function. Default: disable

Table 5. Parameters (MR3 Tab)
Parameter	Options	Description
Multipurpose Register Read Function (MPRRF)	0	Multipurpose register (MPR) read function. This value is fixed.
Multipurpose Register	normal, enable	Set the multipurpose register function. Default: normal

Table 6. Parameters (Timing Tab)These values are automatically set depending on the DDR3 data rate you select except for tREFI.
Parameter	Options	Description
tCL	5	CAS latency (in CK) for reference.
tCWL	5	CAS write latency (in CK) for reference.
tAL	0	Additive latency (in CK) for reference.
tCCD	4	Command to command period (in CK).
tRTP	4	Read to precharge period (in CK) for reference.
tWR	6	Write recovery.
tRCD	12.5	Activate-to-internal read/write delay (in ns) for reference.
tRAS	37.5	Activate-to-precharge command period (in ns) for reference.
tREFI	1 - 7800	Maximum average periodic refresh (in ns). Depend on the DDR3 800D and 800E specification. Default: 7800
tRC	50	Activate-to-activate/refresh command period (in ns) for reference.
tRFC	350	Refresh-to-activate/refresh command period (in ns) for reference.
tWTR	4	Delay from start of internal write transaction to internal read command (in CK) for reference.
tMRD	4	Mode register set command cycle time (in CK) for reference.
tRP	12.5	Precharge command period (in ns) for reference.
tMOD	12	Mode register set command update delay (in CK) for reference.
ODTH8	6	ODT high time with write command and BL8 (in CK) for reference.

Table 7. Parameters (Arbiter Tab)
Parameter	Options	Description
Arbiter Init	0, 1	Select to prioritize write or read operation. 0: Write 1: Read (default)
Arbiter Count	1 - 16	Set the number of read or write command before switching priority to write or read command. Default: 8