Input Auto-Calibration

The input auto-calibration block starts the calibration by increasing the phase with tac_clk (read data clock) a step at a time. The auto-calibration block then writes and reads data from DDR3 starting from address 0x0000 to 0x1000 (4 KB). At the same time, the block compares the data from DDR3 matches the write data. After exhausting all possible phase increment, the auto calibration block calculates the best valid value and write out the PLL setting.