State Machine

The DDR3 Soft Controller core starts initialization when you assert the reset_n signal. Next, the core runs the auto-calibration process if you enable the auto-calibration (cal_ena=1) function. See Input Auto-Calibration for more information about the auto-calibration process. When the core receives a write or read request, the arbiter prioritizes either read or write based on the arbiter parameter settings you set. The core then sends the command to the DDR3 SDRAM.

Figure 1. DDR3 Soft Controller State Machine