Sapphire SoC DS Sapphire SoC UG Sapphire HP SoC DS Sapphire HP SoC UG RISC-V Embedded IDE UG Board Support Package
  • Sapphire RISC-V SoC Hardware Software UG
  • Introduction
    • VexRiscv RISC-V Core
    • Efinity RISC-V Embedded Software IDE
    • Required Software
    • Required Hardware
  • Install Software and SoC
    • Install the Efinity Software
    • Install the Efinity RISC-V Embedded Software IDE
  • IP Manager
    • Customizing the Sapphire SoC
    • SoC Configuration Guideline
    • Modify the Bootloader
      • Updating Bootloader with Efinity BRAM Initial Content Updater
  • Program the Board with the Sapphire RTL Design
    • About the Example Design
    • Enable the On-Board 10 MHz Oscillator (T120 BGA324 Board)
    • Enable the LPDDR4x Memory (Ti180 J484 Board)
    • Installing USB Drivers
    • Program the Development Board
  • Simulate
  • Watchdog Timer
    • Introduction
    • Functional Description
    • Setting Limits for Both Counters
  • Using a UART Module
    • Using the On-board UART (Titanium)
    • Set Up a USB-to-UART Module (Trion)
    • Open a Terminal
    • Enable Telnet on Windows
  • Unified Printf
    • Bsp_print
    • Bsp_printf
    • Bsp_printf_full
    • Semihosting Printing
    • Preprocessor Directives
  • Using a Soft JTAG Core for Example Designs
    • Connect the FTDI Mini-Module
  • Migrating to the Sapphire SoC
    • Migrating to the Sapphire SoC v2.0 from a Previous Version
    • Migrating Ruby, Jade, and Opal to the Sapphire SoC
  • Troubleshooting
    • Error 0x80010135: Path too long (Windows)
    • Installation Error (2350): Path too long (Windows)
    • OpenOCD Error: timed out while waiting for target halted
    • Memory Test
    • OpenOCD error code (-1073741515)
    • OpenOCD Error: no device found
    • OpenOCD Error: failed to reset FTDI device: LIBUSB_ERROR_IO
    • OpenOCD Error: target 'fpga_spinal.cpu0' init failed
    • Eclipse Fails to Launch with Exit Code 13
    • Efinity Debugger Crashes when using OpenOCD
    • Exception in thread "main"
    • Unexpected CPUTAPID/JTAG Device ID
    • Non-existing file for the co_debug_register external tool
    • Error in Final Launch Sequence
    • Debug Core UUID Mismatch
    • Variable references empty selection: ${project_loc}
  • API Reference
    • Control and Status Registers
    • GPIO API Calls
    • I2C API Calls
    • I/O API Calls
    • Core Local Interrupt Timer API Calls
    • User Timer API Calls
    • PLIC API Calls
    • SPI API Calls
    • SPI Flash Memory API Calls
    • UART API Calls
    • RISC-V API Calls
    • Handling Interrupts
  • Inline Assembly
    • Introduction
    • Inline Assembly Syntax
      • Operands
    • RISC-V Registers

Appendix: Create and Build a Software Project (RISC-V SDK)

About this task

After you set up your Eclipse workspace, you are ready to create a new project and build it. These instructions walk you through the process using the axiDemo example project from the software directory.

  • Create a New Project
  • Import Project Settings (Optional)
  • Enable Debugging
  • Build