Trion® FPGAs

Driving the Future of Edge AI Computing

Trion FPGA Overview

The Efinix® Trion® programmable platform, built on Efinix Quantum™ technology, delivers substantial Power-Performance-Area advantages over traditional FPGA products. Trion FPGAs feature programmable logic and a routing fabric built using Quantum technology. The fabric is wrapped with an I/O interface in a small footprint package that is required by many high-volume applications such as mobile and IoT. In addition to logic and routing, the fabric includes embedded memory blocks and multiplier blocks (or DSP blocks).

The initial phase of the Trion platform is built on SMIC's 40LL process, with a logic density range from 4K to 120K logic elements (LEs) and standard interfaces such as GPIO, PLLs, oscillators, MIPI, DDR, LVDS, etc. Trion FPGAs target general-purpose custom logic markets (mobile, IoT, general consumer, industrial, and medical) as well as fast-growing markets such as compute acceleration and deep learning in edge devices.

Trion FPGA Block Diagram

Trion FPGA Block Diagram

Resource and Packaging Overview

Resources and Interfaces

Feature T4 T8 T13 T20 T35 T55 T85 T120
Logic Elements (LEs) 3,888 7,384 12,828 19,728 31,680 54,195 84,096 112, 128
Mask Programmable
Memory (MPM)
Embedded RAM Bits (kb) 77 123 727 1,044 1,475 2,765 4,055 5,407
18x18 Multipliers 4 8 24 36 120 150 240 320
PLLs 1 5 5 7 7 8 8 8
LVDS (TX, RX) 6, 6 13, 13 20, 26 20, 26 52, 52 52, 52 52, 52
(up to 1066 Mbps)
x16 x16 x32 x32 x32
MIPI 4-lane DPHY with
built-in CSI-2 controller
2 RX
2 TX
2 RX
2 TX
2 RX
2 TX
3 RX
3 TX
3 RX
3 TX
3 RX
3 TX

Package Options

Package Pitch
GPIO (1) PLLs LVDS Pairs
TX, RX (1)
DDR DRAM (1) T4 T8 T13 T20 T35 T55 T85 T120
49-ball FBGA 0.4 3x3 33 1      
80-ball WLCSP 0.4 4.5x3.6 33 3      
81-ball FBGA 0.5 5x5 55 1      
144-pin LQFP
0.5 20x20 97 5 6, 6    
169-ball FBGA
0.65 9x9 73 5 8, 12 2, 2  
256-ball FBGA 0.8 13x13 195 5 13, 13    
324-ball FBGA 0.65 12x12 130 7 20, 26 2, 2 x8, x16
400-ball FBGA 0.8 16x16 230 7 20, 26   x8, x16
484-ball FBGA 0.8 18x18 256 8 40, 40   x16, x32
576-ball FBGA 0.65 16x16 278 8 52, 52 3,3 x16, x32
(1) The MIPI and DDR interface have dedicated I/O; therefore; the GPIO number does not include the I/O count for those interfaces.

Standard I/O Interfaces

The initial rollout of Trion FPGAs supports the following interfaces:

  • MIPI—4-lane MIPI D-PHY with a built-in (hardened) CSI-2 controller and up to 6 Gbps per PHY. Achieves low power and low cost, and provides a royalty-free, easy implementation for MIPI CSI-2.
  • LVDS—Up to 800 Mbps LVDS data rate with up to 41.6 Gbps aggregate bandwidth.
  • DDR—Provides DDR3, LPDDR3, LPDDR2 support. Up to 1066 Mbps DDR line rates with up to 34.1 Gbps peak bandwidth. DDR Interface includes hardened PHY and memory controller, providing low power, low cost, and and easy to integrate memory interface.

Mask Programmable Memory (MPM)

The T4, T8, T13, and T20 FPGAs are equipped with optional MPM. With this feature, you use on-chip MPM instead of an external serial flash device to configure the FPGA. This option is for systems that require an ultra-small form factor and the lowest cost structure such that an external serial flash device is undesirable and/or not required at volume production. MPM is a one-time factory programmable option that requires a Non-Recurring Engineering (NRE) payment. To enable MPM, you submit your design to our factory; our Applications Engineers (AEs) convert your design into a single configuration mask to be specially fabricated.

Efinity Software Support

The Efinity® software provides a complete tool flow from RTL design to bitstream generation, including synthesis, place-and-route, and timing analysis. The software has a graphical user interface (GUI) that provides a visual way to set up projects, run the tool flow, and view results. The software also has a command-line flow and Tcl command console. The software-generated bitstream file configures Trion devices. The software supports the Verilog HDL and VHDL languages. Read more

In Production Now

All Trion FPGAs are in production now. Our Trion development kits and FPGAs are available for purchase via DigiKey or your local distributor.

Simple, Easy-to-Use Solution

Trion T4, T8, T13, and T20 FPGAs in 49, 81, and 144 ball FineLine BGA packages are perfect for small factor, low power applications that require quick time to market. You can use them for mobile, IoT, wearables, connectivity for AR/VR, and other general consumer applications.

Easy to use application example


I/O Intensive Solution

The Trion T13, T20, T55, T85, and T120 FPGAs have many GPIO and LVDS pins, making them useful for high-bandwidth interface bridging and I/O expansion. These I/O-rich FPGAs support applications in broadcast, display, control, automation, and robotics.

Bridging Image Sensors and Processors


Complete System Solution

With a DDR3/LPDDR3 memory interface, MIPI interface, and a soft processor system (such as RISC-V), you can use Trion T13, T20, T35, T55, T85, T120, T165, and T200 FPGAs to build complete system solutions for applications like smart home products, surveillance cameras, professional cameras, and high-end intelligent systems. The Quantum core's fine grained architecture, which is at the center of Trion FPGAs, is perfect for building compute-intensive machine learning algorithms and deep neural networks. The T200, which has ample logic elements, DSP blocks, and on-chip RAM, can deliver 1 TOPS for CNN at INT8 precision and 5 TOPS for BNN.

Complete system solution example