Signals

TX PCS clock source

RX PCS clock source

PCS_CLK_TX and PCS_CLK_RX are internally routed from TX_FWD_CLK and are balanced with relevant clock networks.

Both PCS_CLK_TX and PCS_CLK_RX are internally routed from this TX_FWD_CLK and are balanced with relevant clock networks.

In the Interface Designer, the TX_FWD_CLK signal is denoted by "Interface Clock Input Pin Name", indicating where the user needs to assign its name.

100 M: 1.5625 MHz

1 G: 15.625 MHz

10 G: 156.25 MHz

PMA TX electrical idle.

1: TX lines placed into electrical idle state

0: Transmit data

Energy Efficient Ethernet (EEE) alert signaling enable. Selects the preset transmitter de-emphasis setting instead of the trained/equalized value. Asserted high when transmitting the alert signal during EEE operation. Only applies when phy_lm_eth_mode == 1 (i.e., only valid for 10G-KR operation).

If EEE is unused, tie low.

Restart link training. Strobed high (100 ns minimum) to re-initiate

the 10G-KR training process after the process has completed or after training was initially disabled or bypassed.

Assert kr_training_enable_ln_m high prior to de-asserting kr_resetart_training_ln_m for the training process to trigger successfully.

Operates as an active-high reset to the 10G-KR training logic for the associated lane.

Link training enable. When high, enables the 10G-KR

training process immediately upon the PMA becoming ready after the link is enabled. Must be asserted prior to de-assertion of reset and remain asserted until either kr_training_ln_m or kr_training_failure_ln_m is asserted high.

10G-KR frame locked, active hig. Indicates that the 10G-KR training process is receiving 10G-KR training frame headers successfully, headers are spaced appropriately, and it is acquiring accurate link training update and status information from the remote link partner.

10G-KR receiver trained, active high. Indicates that the local receiver has finished evaluation and adjustment of remote transmitter de-emphasis coefficients as part of the 10G-KR training process.

Link training failure, active high. Indicates that the maximum time limit (500 ms) allotted for 10G-KR link training was reached without successful convergence of the local and/or remote equalization algorithms. You can determine the which end of the link inhibited this process by observing the value of kr_local_rx_trained_ln_m. If deasserted, the issue lies between the remote transmitter and the local receiver. If asserted, the issue lies between the local transmitter and remote receiver.

Link power state request. This signal changes the raw SerDes link/port’s power state. When the link/port has completed the transition to the requested power state, the requested state is reflected on pma_xcvr_power_state_ack_p_m.

4’b0000: Idle

4’b0001: A0 - TX/RR active

4’b0010: A1 - Powerdown 1 (low power state with minimum exit latency)

4’b0100: A2 - Powerdown 2 (lower power state with longer exit latency as compared to A1)

4’b1000: A3 - Powerdown 3 (lower power state and longer exit latency as compared to A2)

This signal is one hot encoded. A subsequent change request is not signaled until the current request has been acknowledged and pma_xcvr_power_state_req_p_m has returned to 0.

Upon reset release, the first power state must be A2.

Link power state acknowledgment. This signal indicates that a power state change request has completed.

4’b0000: Value after reset, prior to first power state request

4’b0001: A0

4’b0010: A1

4’b0100: A2

4’b1000: A3

Once a power state is acknowledged, the value remains unchanged until a new power state is requested and the link has completed the transition to the new power state.