FEC Encoder

The FEC encoder takes in 32 66-bit blocks from the scrambler and encodes them into a single FEC block of 2,112 bits. The FEC encoder compresses the two sync bits into one transcode bit as specified in IEEE Std. 802.3 Clause 74. The resulting 32 65-bit blocks are passed through the (2112,2080) encoding process, which generates 32 parity-check bits. The generator polynomial used to generate these bits is:

g(x) = x32 + x23 + x21 + x11 + x2 + 1

The encoder appends the parity check bits to the end of the FEC block. Finally, the encoder scrambles the FEC block using the PN-2112 pseudo-noise sequence with a generator polynomial of r(x) = 1 + x39 + x58.