Receive Block Synchronizer (Non-FEC)

The receive path synchronizer works with the 66b data from the gearbox. A bit-slip shifter slips the data one bit at a time, as controlled by the state machine, to detect a valid sync header boundary.

If 64 consecutive valid sync headers are detected, the synchronizer reports block sync via the top-level signal block_lock. If any sync header within the 64 consecutive 66b blocks is invalid, the bit slipping is restarted. Once block sync is established, 16 invalid sync headers within 64 consecutive 66b blocks are required to drop block sync and restart the bit slipping.