Customizing the Sapphire RV64 SoC

You customize the Sapphire RV64 SoC using the IP Configuration wizard. The parameters are arranged on tabs so you can click through them more easily.

Table 1. Sapphire RV64 SoC CPU and ISA Tab Parameters

Parameter	Option	Description
Number of cores	1 - 4	Enter the number of CPU cores. Default: 1
Atomic Extension	On, off	Choose whether to enable atomic extension instruction support.
Compressed Extension	On, off	Choose whether to enable compressed instruction support.
Floating-point Extension	F-Extension only, F and D-Extension	Choose whether to enable single or double precision for the FPU.
Bit Manipulation Extension	On, off	Choose whether to enable bit manipulation instruction support.
Cache Block Management Extension	On, off	Choose whether to enable cache management instruction support

Table 2. Sapphire RV64 SoC CPU Microarchitecture Tab Parameters

Parameter	Option	Description
Branch Prediction	On, off	Choose whether to enable branch predictor with BTB, RAS and Gshare.
Hardware Prefetcher	On, off	Choose whether to enable hardware prefetcher with RPT algorithm.
Software Prefetcher	On, off	Choose whether to enable software prefetcher.
Supervisor Mode	On, off	Choose whether to enable supervisor mode with SV39 MMU.
Physical Memory Protection	On, off	Choose whether to enable physical memory protection.
Custom Instruction	On, off	Choose whether to enable custom instruction

Table 3. Sapphire RV64 SoC Memory Tab Parameters

Parameter	Option	Description
L1 Data and Instruction Cache way	1, 2, 4 or 8	Choose the L1 data and instruction cache way number (4KB per way).
L2 Cache	On, off	Choose whether to enable L2 cache.
L2 Cache Size	64KB, 128KB, 256KB and 512KB	Choose the L2 cache size.
On-Chip RAM Size	4 KB, 8 KB, 16 KB, 24 KB, 32 KB, 48 KB, 64 KB, 80 KB, 96 KB, 128 KB, 144 KB, 160 KB, 192 KB, 224 KB, 256 KB, 384 KB, 512 KB	Choose the size of the internal BRAM. Default: 4 KB
External Memory Interface	On, off	Instantiate the external memory interface. Default: On Off: The external memory interface is not used.
AXI Interface Type	AXI3, AXI4	Use an AXI4 full duplex interface. Default: AXI4 AXI3: Use an AXI3 half duplex interface.
External Memory Data Width	32, 64, 128, 256, 512	Choose the data width for the AXI interface. Default: 256
External Memory AXI ID Width	6, 8	Choose the width of AXI ID.
External Memory Address Size	4 MB, 8 MB, 16 MB, 32 MB, 64 MB, 128 MB, 256 MB, 0.5 GB, 1 GB, 1.5 GB, 2 GB, 2.5 GB, 3 GB, 3.5 GB,4.0 GB, 4.5 GB, 5.0 GB, 5.5 GB, 6.0 GB, 6.5 GB, 7.0 GB, 7.5 GB, 8.0 GB	Choose the address size for the AXI interface. Default: 1 GB

Table 4. Sapphire RV64 SoC Clock Tab Parameters

Parameter	Option	Description
Frequency (MHz)	20 - 400	Enter the frequency in MHz. Default: 200
Peripheral Clock	On, off	Choose whether you want to run a dedicated clock for the APB3 slaves (SPI, I2C, GPIO, UART, and user timer) and AXI4 master A.
Peripheral Clock Frequency (MHz)	20 - 200	Enter the peripheral clock frequency in MHz.

Table 5. Sapphire RV64 Debug Tab Parameters

Parameter	Option	Description
FPGA Tap Port	1, 2, 3, 4	Choose which Tap port you want to target with the OpenOCD Debugger. This option is only applicable when you are using the JTAG User Tap interface block to communicate with the OpenOCD Debugger.
Hardware Breakpoint	Disabled, 1 - 4	Number of hardware breakpoints. This hardware breakpoint is a program type breakpoint.
Performance Counter	Disabled, 1 - 9	Number of performance counter.
Co-Debug	On, off	Choose whether co-debug mode to share the tap with FPGA Debugger.
Target Board/Cable/Module	Trion T120 BGA324 Development Board Trion T120 BGA576 Development Board Trion T20 BGA256 Development Board Xyloni Titanium Ti60 F225 Development Board Titanium Ti180 J484 Development Board Titanium Ti375 N1156 Titanium Ti375 C529 Topaz Tz170 J484 C232HM-DDHSL-0 (Soft debug) FTDI Module FT2232H (Soft debug) FTDI Module FT4232 (Soft debug) ISX-DLC_EF001 Programming Cable Custom	Choose which board you want to target with OpenOCD. Choose Custom to target your own board.
Application Region Size	1 KB, 2 KB, 4 KB, 8 KB, 16 KB, 32 KB, 64 KB, 128 KB, 256 KB, 512 KB, 1 MB, 2 MB, 4 MB, 8 MB, 16 MB, 32 MB, 64 MB, 128 MB, 256 MB	Modify the linker script to outline the region for the user application. This option is only applicable for SoCs with external memory. For SoCs with internal memory, the region size is determined by the on-chip RAM size.
Application Heap Size	256 B, 512 B, 1 KB, 2 KB, 4 KB, 8 KB, 16 KB, 32 KB, 64 KB, 128 KB, 256 KB, 512 KB, 1 MB, 2 MB, 4 MB, 8 MB, 16 MB, 32 MB, 64 MB, 128 MB	Modify the linker script to specify the application heap size. The size is limited to a maximum of 60% of region size.
Application Stack Size	256 B, 512 B, 1 KB, 2 KB, 4 KB, 8 KB, 16 KB, 32 KB, 64 KB, 128 KB, 256 KB, 512 KB, 1 MB, 2 MB, 4 MB, 8 MB, 16 MB, 32 MB, 64 MB, 128 MB	Modify the linker script to specify the application stack size. The size is limited to a maximum of 60% of region size.
FreeRTOS Region Size	1 KB, 2 KB, 4 KB, 8 KB, 16 KB, 32 KB, 64 KB, 128 KB, 256 KB, 512 KB, 1 MB, 2 MB, 4 MB, 8 MB, 16 MB, 32 MB, 64 MB, 128 MB, 256 MB	Modify the linker script to outline the region for the FreeRTOS. This option is only applicable for SoCs with external memory. For SoCs with internal memory, the region size is determined by the on-chip RAM size.
FreeRTOS Heap Size	256 B, 512 B, 1 KB, 2 KB, 4 KB, 8 KB, 16 KB, 32 KB, 64 KB, 128 KB, 256 KB, 512 KB, 1 MB, 2 MB, 4 MB, 8 MB, 16 MB, 32 MB, 64 MB, 128 MB	Modify the linker script to specify the FreeRTOS heap size. The size is limited to a maximum of 60% of region size.
FreeRTOS Stack Size	256 B, 512 B, 1 KB, 2 KB, 4 KB, 8 KB, 16 KB, 32 KB, 64 KB, 128 KB, 256 KB, 512 KB, 1 MB, 2 MB, 4 MB, 8 MB, 16 MB, 32 MB, 64 MB, 128 MB	Modify the linker script to specify the FreeRTOS stack size. The size is limited to a maximum of 60% of region size.

Table 6. Sapphire RV64 User Interface Tab ParametersWhere n is 0 or 1.

Parameter	Option	Description
Number of APB3	Disable, 1-5	Choose number of instantiations of APB3 slaves.
APB3 Slave Address Size	4 KB, 8 KB, 16 KB, 32 KB, 64 KB, 128 KB, 256 KB, 512 KB, 1MB	Choose the APB slave size. This setting applies to all APB slaves. Default: 64 KB
AXI Master A	On, Off	On: Instantiate the interface. Off: Do not use the interface.
AXI Master A Address Size	1 KB, 2 KB, 4 KB, 8 KB, 16 KB, 32 KB, 64 KB, 128 KB, 256 KB, 512 KB, 1 MB, 2 MB, 4 MB, 8 MB, 16 MB, 32 MB, 64 MB, 128 MB, 256 MB	Choose the size of the AXI Master A.
AXI Master B	On, Off	On: Instantiate the interface. Off: Do not use the interface.
AXI Master B Address Size	1 MB, 2 MB, 4 MB, 8 MB, 16 MB, 32 MB, 64 MB, 128 MB, 256 MB, 512 MB, 1 GB, 2 GB, 4 GB, 8 GB, 16 GB, 32 GB, 64 GB	Choose the size of the AXI Master B.
AXI Master B Data Width	32, 64, 128, 256, 512	Choose the data width of the AXI Master B.
AXI Slave n	On, off	On: Instantiate the interface. Off: Do not use the interface.
AXI Slave n Data Width	32, 64, 128, 256, 512	Choose the width of the AXI Slave. The AXI Slave width must not be larger than the external memory data width.

Table 7. Sapphire RV64 GPIO Tab ParametersWhere n is 0 or 1.

Parameter	Options	Description
GPIO n	On, off	On: Instantiate the interface. Off: Do not use the interface.
GPIO n Bit Width	1, 2, 4, 8, 16, 32	Choose the number of pins for the GPIO. Default: 4 (GPIO 0), 8 (GPIO 1)

Table 8. Sapphire RV64 UART Tab ParametersWhere n is 0 or 1

Parameter	Options	Description
UART n	On, off	On: Instantiate the interface. Off: Do not use the interface.
UART n FIFO Depth	64, 128, 256	Specify the depth of UART’s FIFO.

Table 9. Sapphire RV64 I2C Tab Parameters

Parameter	Options	Description
I2C	Disabled, 1 - 5	Choose the number for the I2C.

Table 10. Sapphire RV64 SPI Tab ParametersWhere n is 0, 1, or 2.

Parameter	Options	Description
SPI n	On, off	On: Instantiate the interface. Off: Do not use the interface.
SPI n Data Width	8 - 16	Configure the data width for the SPI interface. Note: Only applicable for SPI 1 and SPI 2.
SPI n Chip Select Width	1 - 8	Choose the number of Chip select required for the SPI interface.
SPI n FIFO Depth	64, 128, 256, 512, 1024, 2048	Specify the depth of SPI’s FIFO.

Table 11. Sapphire RV64 User Interrupt Tab Parameters

Parameter	Options	Description
User Interrupt	Disabled, 1 - 8	Choose the number of the user interrupt.

Table 12. Sapphire RV64 User Timer Tab ParametersWhere n is 0, 1, or 2.

Parameter	Options	Description
User Timer n	On, off	On: Instantiate the interface. Off: Do not use the interface.
User Timer n Counter Width	12, 16, 32	Choose the counter bit width. Default: 12
User Timer n Prescaler Width	8, 16	Choose the prescaler bit width. Default: 8

Table 13. Sapphire RV64 Watchdog Timer Parameters

Parameter	Option	Description
Watchdog Timer	On, Off	On: Instantiate the interface. Off: Do not use the interface.
Watchdog Timer Prescaler Width	8, 16, 24, 32	Choose the prescaler bit width. Default: 24
Watchdog Timer Counter Width	16, 24, 32	Choose the counter bit width. Default: 16