Introduction
The MIPI DSI specifies the physical link between the chip and display in devices such as smartphones, tablets, AR/VR headsets and connected cars1. It defines a serial bus and a communication protocol between the host, the source of the image data, and the destination, for example, display peripherals. The MIPI DSI RX Controller core implements the MIPI DSI interface in the FPGA and allows you to configure the related parameters.
Use the IP Manager to select IP, customize it, and generate files. The MIPI DSI RX Controller core has an interactive wizard to help you set parameters. The wizard also has options to create a testbench and/or example design targeting an Efinix® development board.