Revision History
| Date | Document Version | IP Version | Description |
|---|---|---|---|
| August 2025 | 4.6 | 5.3 | Updated num_bytes[7:0] in table I2C Master Ports.
(DOC-2662) Updated figure Write Operation on I2C
Master Waveform, Multiple Write Operation on I2C Master
Waveform, and Read Operation on I2C Master
Waveform. Updated step 1 in both section Performing a
Write Operation on I2C Slave and Performing a Read
Operation on I2C Slave. |
| November 2024 | 4.5 | 5.2 | Added Device Support and release notes sections. (DOC-1234) Added
Topaz in Device Support. (DOC-2176) Added IP Version in
Revision History. (DOC-2185) |
| February 2023 | 4.4 | – | Added note about the resource and performance values in the resource and utilization table are for guidance only. |
| January 2022 | 4.3 | – | Updated resource utilization table. (DOC-700) |
| October 2021 | 4.2 | – | Added note to state that the fMAX in Resource Utilization
and Performance, and Example Design Implementation tables were based on
default parameter settings. Updated design example target board to
production Titanium Ti60 F225 Development Board and updated
Resource Utilization and Performance, and Example Design
Implementation tables. (DOC-553) |
| September 2021 | 4.1 | – | Removed num_bytes [7:0] port possible values limitation. |
| June 2021 | 4.0 | – | Added note about including all .v generated in
testbench folder is required for simulation. Added write_done,
data_out_valid, and slv_command_byte ports. Updated
resource utilization and performance table. Updated
example design output and implementation table. Added
support for Titanium FPGAs and example design for
Titanium Ti60 F225 Development Board. Added
multiple write on master waveform. Updated for Efinity
v2021.1. |
| December 2020 | 3.0 | – | Added busy signal to the I2C slave controller. Updated
core name to I2C core. Updated user guide for
Efinix® IP Manager which includes added IP
Manager topics, updated parameters, and user guide
structure. |
| July 2020 | 2.0 | – |
Updated for I2C Master/Slave Controller core v2.0.
Added support for SDA and SCL spike filtering and SCL clock
stretching.
Updated LUTs utilization for master and slave mode in resource
utilization and performance.
Added MASTER_I2C_FAST_MODE, MASTER_CLOCK_FREQ,
MASTER_SPIKE_FILTER_CYCLE, SLAVE_I2C_FAST_MODE, SLAVE_CLOCK_FREQ,
and SLAVE_SPIKE_FILTER_CYCLE parameters.
Updated LUTs and fMAX in example design
implementation.
Updated example design block diagram to remove clock divider block.
I2C I2C core v2.0
supports core clock frequency of 150 Mhz and 100 Mhz and clock
divider is no longer needed.
|
| May 2020 | 1.0 | – | Initial release. |