I²C Core Registers

Data byte from command_byte and din ports are written into this data register and transferred out through the I²C bus.

When num_bytes is more than 2, the subsequent byte of din is written to MIDR after one byte of data transfer completed.

Data received from the I²C transfer is written to this register. This register value is assigned to the data_out port.

When there are more than 1 byte of data received, the previous data byte is right-shifted to the least significant bit (LSB) and concatenate with the current received byte to form data_out.

This is an I²C slave specific register. Parameter SLAVE_ADDR is assigned to this register.

This register value is compared with the I²C header byte send by the I²C master. If these values match, the I²C slave sends ACK the I²C master. Otherwise, it sends NACK to the ²C master.

The least significant bit is ignored. Only MADR [7:1] are compared with the header byte.