I2C Example Design
You can choose to generate the example design when generating the core in the IP Manager Configuration window. Compile the example design project and download the .hex or .bit file to your board. To generate example design, the Example Design Deliverables Option signal must be enabled.
The example designs the target the Trion® T20 BGA256 Development Board and Titanium Ti60 F225 Development Board.
The example design flow consists of the following steps:
- The user control logic asserts the
writesignal withdin,command_byte, andnum_bytesassigned to the I2C master. - The I2C master sends data to the I2C slave, once complete,
the user control logic asserts
write_donesignal. - Once the
ready_to_rdsignal is high, the user control logic asserts thereadsignal to the I2C slave and start receiving the data from I2C master. - Once the
rddata_validsignal is high, the user control logic compares the read data from the I2C slave with the write data written from I2C master. - The user control logic asserts the read signal with
command_byteandnum_bytesassigned to the I2C master. - The I2C master sends
command_byteto the I2C slave. - Once the
ready_to wrsignal is high, the user control logic asserts the write signal withdinto the I2C slave. - The I2C slave sends data to the I2C master.
- Once the
data_out_validsignal is high, the user control logic compares the read data from the I2C master with the write data written from I2C slave. - Once the
busysignal is low, the example design operation is completed.
Trion® T20 BGA256 Development Board
External jumpers are required to connect the I2C SDA and SCL ports between master and slave at the Trion® T20 BGA256 Development Board. The following table describes the external jumper requirements for the example design.
| Connection Port | Header | Jumper Setting |
|---|---|---|
| SDA | H2 | Connect pins 17 and 18 |
| SCL | H2 | Connect pins 21 and 22 |
The LED displays the first data byte that the slave or master receive sequentially from LED D3, D4, D5 and D6 continuously.
Titanium Ti60 F225 Development Board
External jumpers are required to connect the I2C SDA and SCL ports between master and slave at the Titanium Ti60 F225 Development Board through the MIPI and LVDS Expansion Daughter Card. Connect the P3 header of the daughter card to the P2 header of the Titanium Ti60 F225 Development Board.
The following table describes the external jumper requirements at the MIPI and LVDS Expansion Daughter Card for the example design.
| Connection Port | Header | Jumper Setting |
|---|---|---|
| SDA | J5 | Connect pins 32 and 34 |
| SCL | J5 | Connect pins 38 and 40 |
The LED displays the first data byte that the slave or master received in sequentially from LEDs D16 green and LED D17 white to LED D16 red and LED D17 yellow continuously.
| FPGA | Mode | Logic Utilization (LUTs) | Registers | Memory Blocks | Multipliers | fMAX (MHz)1 | Efinity® Version2 |
|---|---|---|---|---|---|---|---|
| T20 BGA256 C4 | Master | 723 | 414 | 0 | 0 | 95 | 2021.1 |
| Slave | 722 | 414 | 0 | 0 | 93 |
| FPGA | Mode | Logic and Adders | Flip-flops | Memory Blocks | DSP48 Blocks | fMAX (MHz)1 | Efinity® Version2 |
|---|---|---|---|---|---|---|---|
| Ti60 F225 C4 | Master | 703 | 414 | 0 | 0 | 332 | 2021.2 |
| Slave | 700 | 414 | 0 | 0 | 339 |