Ports

Table 1. I²C Master Ports
Port	Interface	Direction	Description
scl_in	I²C	Input	I²C clock input.
sda_in	I²C	Input	I²C data input.
scl_out	I²C	Output	I²C clock output.
scl_oe	I²C	Output	I²C clock output enable.
sda_out	I²C	Output	I²C data output.
sda_oe	I²C	Output	I²C data output enable.
clk	System	Input	IP clock.
rst	System	Input	IP reset.
din [DATA_WIDTH-1:0]	System	Input	Write data input.
command_byte [7:0]	System	Input	This 8-bit data is sent to the I²C slave device during the I²C command phase.
num_bytes [7:0]	System	Input	Determines the number of data in bytes to be written to the I²C slave device or read back from the I²C slave device. The value includes both data bytes and command byte. E.g., To transfer 7 data bytes, set num_bytes=8'h8.
read	System	Input	Assert high for one clock cycle to read data from the I²C slave device. Assign num_bytes before asserting the read port.
write	System	Input	Assert high for one clock cycle to write data to the I²C slave device. Assign num_bytes, command_bytes, and din before asserting the write port.
i2c_soft_rst	System	Input	Soft reset the I²C bus.
i2c_arb_lost_clr	System	Input	Assert high for one clock cycle to clear the i2c_arb_lost port.
i2c_slave_addr [7:0]	System	Input	This 8-bit data is sent to the I²C slave device during the I²C header phase. The least significant bit is ignored.
data_out [DATA_WIDTH-1:0]	System	Output	Read data output.
i2c_busy	System	Output	Logic high indicates that the I²C bus is busy.
i2c_arb_lost	System	Output	Logic high indicates that there is arbitration lost in the I²C transfer.
i2c_rxak	System	Output	Logic low indicates that the I²C slave device received and acknowledged the I²C transfer.
write_done	System	Output	Logic high indicates that I²C master write data is sent and ready to accept by I²C slave device.
data_out_valid	System	Output	Logic high indicates that I²C master read data is valid and ready to read by user.

Table 2. I²C Slave Ports
Port	Interface	Direction	Description
scl_in	I²C	Input	I²C clock input.
sda_in	I²C	Input	I²C data input.
scl_out	I²C	Output	I²C clock output.
scl_oe	I²C	Output	I²C clock output enable.
sda_out	I²C	Output	I²C data output.
sda_oe	I²C	Output	I²C data output enable.
clk	System	Input	IP clock.
rst	System	Input	IP reset.
din [DATA_WIDTH-1:0]	System	Input	Write data input.
read	System	Input	Assert high for one clock cycle to read data from the I²C master.
write	System	Input	Assert high for one clock cycle to write data to the I²C master. Number of data bytes to be sent to the master is equal to DATA_WIDTH/8.
data_out [DATA_WIDTH-1:0]	System	Output	Read data output.
ready_to_wr	System	Output	Logic high indicates that the slave is ready to accept write data from the user.
ready_to_rd	System	Output	Logic high indicates that the slave has read data ready to be read.
rddata_valid	System	Output	Logic high indicates that the read data is valid and ready to be read by the user.
busy	System	Output	Logic high indicates the is busy.
command_bytes [7:0]	System	Output	This 8-bit data is received from I²C master device during the I2C command phase.