I2C Testbench

You can choose to generate the testbench when generating the core in the IP Manager Configuration window. To generate testbench, the Testbench Deliverables Option signals must be enabled.

Note: You must include all .v files generated in the /Testbench directory in your simulation.
Important: tested the testbench generated with the default parameter options only.

provides a simulation script for you to run the testbench quickly using the Modelsim software. To run the Modelsim testbench script, run vsim -do modelsim.do in a terminal application. You must have Modelsim installed on your computer to use this script.

The testbench provides read and write tests. Each test case indicates a pass or fail results for the register read/write tests. After running the simulation, the test prints the following message indicating the pass/fail results:

Slave received the command byte from Master 01
Slave received the data byte from Master 040302
Slave received the command byte from Master 02
Slave received the data byte from Master 060504
Master received the data byte from Slave, 4
Note: If you want to use your own testbench file, add the following line in your testbench file, instancename_tb.v: 
`define SIM