Ti180 Dedicated DDR Pinout

Table 1. Dedicated DDR Pinoutn indicates the number.

Function	Direction	Description
DDR_A[n]1	Output	Address signals to the memories.
DDR_CKE1	Output	Active-high clock enable signals to the memories.
DDR_CK1 DDR_CK_N	Output	Differential clock output pins to the memories.
DDR_CS_N1	Output	Active-low chip select signals to the memories.
DDR_DQ[n] 1	I/O	Data bus to/from the memories.
DDR_DM[n]1	I/O	Active-high data-mask signals to the memories.
DDR_DQS[n]1 DDR_DQS_N[n]	I/O	Differential data strobes to/from the memories.
DDR_RST_N1	Output	Active-low reset signals to the memories.
DDR_CAL	Input	240 Ω to ground reference resistor port.
VDD_PHY	–	DDR digital power supply.
VDDQ_PHY	–	DDR I/O power supply.
VDDQX_PHY	–	DDR I/O pre-driver power supply.
VDDPLL_MCB_TOP_PHY	–	DDR PLL power supply.
VDDQ_CK_PHY	–	DDR I/O power supply for clock.

Table 2. Dedicated LPDDR4x DRAM Pinout (J484D1 Only)

Function	Direction	Description
VDD1	–	Core 1 power for LPDDR4x SDRAM.
VDD2	–	Core 2 power/input buffer for LPDDR4x SDRAM.
VDDQ	–	I/O buffer power for LPDDR4x SDRAM.
ZQ	Input	Calibration resistor pin. This pin calibrates the drive strength and termination resistance. Connect the ZQ pin to VDDQ through a 240 Ω ± 1% resistor