Customizing the BRAM Wrapper
The core has parameters so you can customize its function. You set the parameters in the General tab of the core's IP Configuration window.
| Parameter | Options | Memory Type | Description |
|---|---|---|---|
| Memory Type | Single-port RAM, Simple Dual-port RAM, True Dual-port RAM, Single-port ROM, Dual-port ROM | All | Select the target memory type. Default: Simple Dual-port
RAM |
| Memory Mode | Speed, Area | All | Select to optimize speed or area. Default:
Speed |
| Write Mode | READ_FIRST, WRITE_FIRST, READ_UKNOWN, | Single-port RAM, Simple Dual-port RAM | Define memory configuration: READ_FIRST: Old memory content
is read. WRITE_FIRST: Write data is passed to the read
port. Note: Write First is not supported
on SDP RAM. READ_UNKNOWN: Read and write
are unsynchronized, therefore the results of the address can
conflict. Default: READ_FIRST |
| Write Mode A | READ_FIRST, WRITE_FIRST, NO_CHANGE | True Dual-port RAM | Define memory behaviour: READ_FIRST: Old memory content is
read. WRITE_FIRST: Write data is passed to the read
port. NO_CHANGE: The output keeps the memory content
of last read address if the write operation is
applied. Default: READ_FIRST |
| Write Mode B | READ_FIRST, WRITE_FIRST, NO_CHANGE | True Dual-port RAM | Define memory behaviour: READ_FIRST: Old memory content is
read. WRITE_FIRST: Write data is passed to the read
port. NO_CHANGE: The output keeps the memory content
of last read address if the write operation is
applied. Default: READ_FIRST |
| Width Ratio | 16:1, 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8, 1:16 | Simple Dual-port RAM, True Dual-port RAM, Dual-port ROM | Select symmetrical or asymmetrical width ratios. Default:
1:1 |
| Port A: Data Bus Width | 1-1024 | All | Define BRAM write data bus width. The width is multiple of 2 from
20 - 210. Default: 16 Note: True Dual Port RAM supports 8-bit and
above. |
| Port B: Data Bus Width | - | Single-port RAM, Simple Dual-port RAM, True Dual-port RAM, Dual-port ROM | Define BRAM read data bus width. The width is auto calculated by
the choice of width ratio. Default: 16 Note: True Dual Port RAM supports 8-bit and
above. |
| Port A: BRAM Depth | 1-16384 | All | Define the BRAM depth. The depth is multiples of 2 from
21 - 213. Default: 8 |
| Port B: BRAM Depth | - | Single-port RAM, Simple Dual-port RAM, True Dual-port RAM, Dual-port ROM | Define the BRAM depth. The depth is auto calculated via Width
Ratio selections. Default: 8 |
| Byte Enable | Enable, Disable | Single-port RAM, Simple Dual-port RAM, True Dual-port RAM | Define a group of data to be masked. Default:
Disable |
| Group Data Width | - | Single-port RAM, Simple Dual-port RAM, True Dual-port RAM | Support 8 bit data per group only. |
| Byte Enable Width | - | Single-port RAM, Simple Dual-port RAM, True Dual-port RAM | Define number of groups. Auto calculated. |
| Write Enable | Enable, Disable | Single-port RAM, Simple Dual-port RAM | Define Enable Write operations. Default: Enable |
| Port A: Write Enable | Enable, Disable | True Dual-port RAM | Define Enable Write operations via Port A. Default:
Enable |
| Port B: Write Enable | Enable, Disable | True Dual-port RAM | Define Enable Write operations via Port B. Default:
Enable |
| Read Enable | Enable, Disable | Single-port RAM, Simple Dual-port RAM, Single-port ROM | Define Enable read operations. Default: Enable |
| Write Address Enable | Enable, Disable | Single-port RAM, Simple Dual-port RAM | Define address stall during write operations. Default:
Enable |
| Read Address Enable | Enable, Disable | Single-port RAM, Simple Dual-port RAM | Define address stall during read operation. Default:
Enable |
| Port A: Address Enable | Enable, Disable | True Dual-port RAM | Define address stall during write/read operation via Port
A. Default: Enable |
| Port B: Address Enable | Enable, Disable | True Dual-port RAM | Define address stall during write/read operation via Port
B. Default: Enable |
| Reset Enable | Enable, Disable | Single-port RAM, Simple Dual-port RAM, Single-port ROM | Define BRAM reset pin. Default: Enable |
| Port A: Reset | Enable, Disable | True Dual-port RAM, Dual-port ROM | Define BRAM reset via Port A. Default: Enable |
| Port B: Reset | Enable, Disable | True Dual-port RAM, Dual-port ROM | Define BRAM reset via Port B. Default: Enable |
| Write Clock Enable | Enable, Disable | Single-port RAM, Simple Dual-port RAM | Define clock gate for write operation. Default:
Enable |
| Clock Mode | Single Clock, Dual Clock | Simple Dual-port RAM, True Dual-port RAM, Dual-port ROM | Define BRAM clock dependency for read and write
operations. Default: Single Clock |
| Initialize BRAM Memory File | Enable, Disable | All | Define user input BRAM Memory file. See Memory Initialization Files. Default: Disable |
| Memory File (.mem) | - | All | Enter the path to your target user application. The file must be in .mem format. |