Features

• Supports:
  • Single-port RAM (SP RAM)
  • Simple Dual-port RAM (SDP RAM)
  • True Dual-port RAM (TDP RAM)
  • Single-port ROM (SP ROM)
  • Dual-port ROM (DP ROM)
• Supports a wide range of memory addresses and data width (limited only by the FPGA's block RAM)
• Supports:
  • Symmetric port ratio for all RAM and ROM
  • Asymmetric aspect ratio for dual-port configuration (write-to-read port ratios ranging from 1:16 to 16:1).
• Selectable RAM Mode: WRITE_FIRST, READ_FIRST and READ_UNKNOWN or NO_CHANGE
• Configurable memory initialization
• Single clock and dual clock mode
• Includes example design targeting Titanium Ti60F225 and Trion T120BGA576 Development Boards
• Testbench demonstrating memory operation simulation